MPC8560/40 PowerQUICC III Microcontroller Class Dates Offered: No open Class is planned at this time, PLEASE CONTACT ARNEWSH INC. FOR ONSITE TRAINING
Description:	This is a 5-day class covering hardware and software aspects of the MPC8560/40 PowerQUICC III microcontroller. A customized, shorter version can be arranged for on-site training. Students will learn to design and write programs for various chip submodules. This includes the embedded Power Architecture Core (e500 with MMU and Caches), Local bus, PCI/PCI-X, RapidIO, Three Speed Ethernet Controllers, DMA controller, DDR Controller, Reset and configuration and Interrupt Controller.
Objectives:	Learn the architecture of e500 core Configure MMU and set up caches (L1 and L2) Learn the exception processing in e500 Configure the interrupt controller Configure Local bus memory controller Configure the DDR controller Configure and use PCI/PCI-X bus interface Configure and use RapidIO bus interface Reset and hardware configuration of the MPC8560/40 Configure and use the Three Speed Ethernet Controller
Prerequisites:	To benefit most from the course, the students are expected to be familiar with the Power Architecture. Only an overview of CPM module is covered due to similarity to PowerQUICC II. On-site classes can be customized to exclude topics or add CPM related modules.
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