MPC824x family of Integrated PowerPC Microprocessors

 Dates Offered:
NO OPEN CLASSES ARE PLANNED AT THIS TIME,
PLEASE CONTACT ARNEWSH INC. FOR ONSITE TRAINING

Description: This is a 4-day class covering both the software and hardware aspects of the MPC824x family of Integrated PowerPC Microprocessors (8240/41/45). This class consists of lecture and exercises.

Students will learn to design and write programs for various chip sub-modules. This includes the PPC Core (including the cache and MMU), the PCI bridge, the Memory Controller, the Interrupt Controller, and the I/O modules.

Objectives:
  • Overview of PowerPC architecture.
  • Programming model, data types, and addressing modes.
  • Instruction set, program structures, program loops, subroutines.
  • Exceptions- internal and external exceptions, interrupts.
  • Program the configuration registers.
  • Select the appropriate address map.
  • Initialize, prioritize and service EPIC interrupts.
  • Interface to, and program the memory controller.
  • Utilize the PCI bus interface to arbitrate, do exclusive accesses, relocate an 824x's Boot ROM, and maximize throughput.
  • Use the DMA controller to move blocks of data between local and PCI memory.
  • Manage the low power modes.
  • Utilize the debug features.
  • Communicate with I2C devices.
  • Use the message unit to interrupt processors.
Prerequisites: The students should have advanced microprocessor and assembly language knowledge. An understanding of general memory management, multi-processing, multi-master, and cache concepts is also beneficial.

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