T4240/T4160/T4080 QorIQTM Integrated Multicore Communications Processor Class Dates Offered: April 18 to April 22, 2016 in SAn Jose, CA PLEASE CONTACT ARNEWSH INC. FOR ONSITE TRAINING
Description:	This is a 5-day class covering the hardware and software aspects of the QorIQ T4240/T4160/T4080 and T2080/T2081 Integrated Multicore Communications Processors. A customized, shorter version can be arranged for on-site training. Students will learn to design and write programs for various chip sub-modules. This includes the embedded Power Architecture Cores (dual-threaded 64-bit e6500 with MMU and Caches), Buffer Manger, Queue Manager, PAMU, Frame Manager (icluding Parser, KeyGen, Coarse Classifier, Policer, and the MAC units), PCI Express, Serial RapidIO, RapidIO Message Manager (RMan), DMA controllers, Integrated Flash Controller, DDRIII/IIIL Controller, Reset, configuration and Interrupt Controller.
Objectives:	Learn the architecture of e6500 core Configure MMU and set up caches (L1, L2, and L3) Learn the exception processing in e6500 Configure the interrupt controller Reset and hardware configuration of the T4240/T4160/T4080 Configure Peripheral Access Management Unit (PAMU) Configure and use Buffer Manager (BMan) Configure and use Queue Manager (QMan) Configure and use Frame Manager (FMan), Parser, KeyGen, Coarse Classifier, and Policer Configure and use the MAC units Configure and use DMA Controllers Configure and use PCI Express Configure and use Serial RapidIO Configure and use RapidIO Message Manager Configure Integrated Flash Controller Configure the DDRIII/IIIL Controller
Prerequisites:	To benefit most from the course, familiarity with the Power Architecture is recommended. On-site classes can be customized to exclude topics which are not of interest.
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